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Using FPGA Compiler N-Input LUT Optimization for FLEX 6000, FLEX 8000 & FLEX 10K DevicesThe Synopsys FPGA Compiler software supports an N-input look-up table (LUT) function that improves the quality of the results and the predictability of delay and resource estimates. All Figure 1 shows a sample command sequence that FPGA Compiler might require for N-input LUT optimization. To use N-input LUT optimization, include the
Use the area report to determine the circuit area.
If you wish to maintain area report estimates as closely as possible during
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| Last Updated: August 28, 2000 for MAX+PLUS II version 10.0 | ||||||||
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Copyright © 2000 Altera Corporation, 101 Innovation Drive, San Jose, California 95134, USA. All rights reserved. By accessing any information on this CD-ROM, you agree to be bound by the terms of Altera's Legal Notice. | ||||||||