MAX+PLUS II ACCESS Key Guidelines
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MAX+PLUS II/Synopsys Interface File Organization

Table 1 shows the MAX+PLUS® II/Synopsys interface subdirectories that are created in the MAX+PLUS II system directory (by default, the /usr/maxplus2 directory) during the MAX+PLUS II software installation. For information on the other directories that are created during the MAX+PLUS II software installation, see "MAX+PLUS II File Organization" in MAX+PLUS II Installation in the MAX+PLUS II Getting Started manual.

Note: You must add the /usr/maxplus2/bin directory to the PATH environment variable in your .cshrc file in order to run the MAX+PLUS II software.

Table 1. MAX+PLUS II Directory Organization
Directory
Description
./synopsys/binContains script programs to convert Synopsys timing constraints into MAX+PLUS II Assignment & Configuration File (.acf) format, and to analyze VHDL System Simulator simulation models.
./synopsys/config Contains sample .synopsys_dc.setup and .synopsys_vss.setup files.
./synopsys/examples Contains sample files, including those discussed in these ACCESS Key Guidelines.
./synopsys/library/alt_pre/<device family>/src Contains VHDL simulation libraries for functional simulation of VHDL projects.
./synopsys/library/alt_pre/verilog/src Contains the Verilog HDL functional simulation library for Verilog HDL projects.
./synopsys/library/alt_pre/vital/src Contains the VITAL 95 simulation library. You use this library when you perform functional simulation of the design before compiling it with the MAX+PLUS II software.
./synopsys/library/alt_syn//<device family>/lib Contains interface files for the MAX+PLUS II/Synopsys interface. Technology libraries in this directory allow the Design Compiler and FPGA Compiler to map designs to Altera® device architectures.
./synopsys/library/alt_mf/src Contains behavioral VHDL models of some Altera macrofunctions, along with their component declarations. The a_81mux, a_8count, a_8fadd, and a_8mcomp macrofunctions are currently supported. Libraries in this directory allow you to instantiate, synthesize, and simulate these macrofunctions.
./synopsys/library/alt_post/syn/lib Contains the post-synthesis library for technology mapping.
./synopsys/library/alt_post/sim/src Contains the VHDL source files for the VITAL 95-compliant library. You use this library when you perform simulation of the design after compiling it with the MAX+PLUS II software.

Go to: Go to the following topics, which are available on the web, for additional information:

Last Updated: August 28, 2000 for MAX+PLUS II version 10.0
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