Using Cadence Composer & MAX+PLUS II Software

The following topics describe how to use the Cadence Composer software with MAX+PLUS^® II software. Click on one of the following topics for information:

CLICK HERE to open a printable version of all topics listed on this page.

Setting Up the MAX+PLUS II/Cadence Working Environment

• Software Requirements
• MAX+PLUS II Directory Structure
• MAX+PLUS II/Cadence Interface File Organization
• Composer Project File Directory Structure
• Altera-Provided Logic & Symbol Libraries

Design Entry

• Design Entry Flow
• Creating Composer Schematics for Use with MAX+PLUS II Software
• Entering Resource Assignments
  • Assigning Pins, Logic Cells & Chips
  • Assigning Cliques
  • Assigning Logic Options
  • Modifying the Assignment & Configuration File with the setacf Utility
• Creating Hierarchical Projects in Composer Schematics
• Converting Composer Schematics into MAX+PLUS II-Compatible EDIF Netlist Files with the altout Utility

Functional Simulation

• Performing a Functional Simulation of a Composer Schematic with Verilog-XL Software

	Go to the following MAX+PLUS II ACCESSSM Key topics for related information:
	Compiling Projects with MAX+PLUS II Software Programming Altera Devices

	Go to the following topics, which are available on the web, for additional information:
	MAX+PLUS II Development Software Altera Programming Hardware Cadence web site (http://www.cadence.com)

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