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Assigning Pins, Logic Cells & ChipsYou can assign a single logic function to a specific pin or logic cell (including I/O cells and embedded cells) within a chip, and assign one or more functions to a specific chip. A chip is a group of logic functions defined as a single, named unit, which can be assigned to a specific device. You can assign a signal to a particular
pin to ensure that the signal is always associated with that pin,
regardless of future changes to the project. If you wish to set
and maintain the performance of your project, assigning logic
to a specific logic cell within a chip can minimize timing delays.
In a project that is partitioned among multiple devices, you can
assign logic functions that must be kept together in the same
device to a chip. Chip assignments allow you to split a project
so that only a minimum number of signals travel between devices,
and to ensure that no unnecessary device-to-device delays exist
on critical timing paths. You can assign a chip to a device in
To make pin, logic cell, and chip assignments, use the edifout_write_properties_list = {LOGIC_OPTION, CLIQUE, CHIP_PIN_LC}
Table 1 shows the syntax to use for chip, pin, and logic cell assignments:
Note:
Examples:
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| Last Updated: August 28, 2000 for MAX+PLUS II version 10.0 | |||||||||||||||||||
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Copyright © 2000 Altera Corporation, 101 Innovation Drive, San Jose, California 95134, USA. All rights reserved. By accessing any information on this CD-ROM, you agree to be bound by the terms of Altera's Legal Notice. | |||||||||||||||||||