MAX+PLUS II ACCESS Key Guidelines
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Assigning Cliques

You can define a group of logic functions as a single, named unit, called a clique. The MAX+PLUS® II Compiler attempts to place all logic in the clique in the same logic array block (LAB) to ensure optimum speed. If the project does not use multi-LAB devices, or if it is not possible to fit all clique members into a single LAB, the clique assignment ensures that all members of a clique are placed in the same device. In FLEX® 6000, FLEX 8000, MAX® 9000, and FLEX 10K devices, the Compiler also attempts to place the logic in LABs in the same row. Cliques therefore allow you to partition a project so that only a minimum number of signals travel between LABs, and to ensure that no unnecessary LAB-to-LAB or device-to-device delays exist on critical timing paths.

To make pin, logic cell, and chip assignments, use the set_attribute command at a dc_shell prompt. Before using the set_attribute command, add the following line to your .synopsys_dc.setup file:

edifout_write_properties_list = {LOGIC_OPTION, CLIQUE, CHIP_PIN_LC} Enter


Enter To assign a clique, type the following command at a dc_shell prompt:
 
set_attribute find(<design object>,(<instance name>))"CLIQUE" -type string "<clique name>" Enter
 
For example:
set_attribute find (cell, (U1)) "CLIQUE" -type string "fast1" Enter

Go to:

Go to the following topics in MAX+PLUS II Help for related information:

  • Assigning a Clique
  • Guidelines for Achieving Maximum Speed Performance

Last Updated: August 28, 2000 for MAX+PLUS II version 10.0
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